1. Field of the Invention
The present invention generally relates to a fabricating method of an insulator. In particular, the present invention is directed to a fabricating method of an insulator for use between two gate structures.
2. Description of the Prior Art
With the increasing integration density of semiconductors, a metal-oxide-semiconductor field-effect transistor (MOSFET) has evolved from a flat MOSFET to an embedded MOSFET in order to scale down the volume. An MOSFET usually includes a gate structure as well as a diffusion region. The diffusion region is often referred to as a source region or a drain region in accordance with the operation of the transistor.
An embedded MOSFET generally includes a conductive gate reaching to a trench in the Si substrate, and a dielectric layer is disposed between the conductive gate and the Si substrate to electrically insulate the conductive gate and the Si substrate. In operation, each MOSFET is controlled by a voltage which is applied to the gates. Once the voltage is higher than a threshold voltage, a current is generated around the periphery of the trench.
Sometimes, some insulators are placed between the MOSFETs to keep two neighboring MOSFETs from being electrically connected. The insulators are usually called insulating gate transistors, whose structures are roughly similar to other embedded MOSFETs. However, by applying a suitable bias to an insulating gate transistor, usually a negative bias, the insulating gate transistor can possibly become an open circuit permanently, in an off-state. In such a way, it may serve as an insulator.
In the light of the increasing scaling down of integrated circuits, an insulator of smaller volume is needed to reduce the occupancy and to save more space, and to further enhance the insulating ability of the insulator.